Technical Field
The present invention relates to graphics processing, and in particular, it relates to methods for combining instructions and apparatuses having multiple data pipes.
Description of the Related Art
The GPU (Graphics Processing Unit) architecture typically has hundreds of basic shader processing units, referred to as SPs (Stream Processors). Each SP may deal with one SIMD (Single Instruction Multiple Data) thread of one instruction per cycle, and then switch into another SIMD thread at the next cycle. The performance of GPU is affected by two important factors: the total amount of SPs and the capacities of one SP. Thus, methods for combining instructions and apparatuses having multiple data pipes are introduced to improve the capacities of one SP.